CMPS 3240 Computer Architecture II: Organization (4)
This course focuses on the design of the CPU and computer system at a 
functional level. Topics include CPU instruction sets and functional units,
control unit design, interrupt handling and DMA, I/O support, memory
hierarchy, virtual memory, buses and bus timing, and an introduction to
instruction level parallelism, multithreading, and multiprocessing. Hardware
security issues will also be discussed.
Prerequisite: CMPS 2240 or ECE 3200
Knowledge of an assembly programming language
Number systems and data representation
Basics of digital logic design
4 semester units. 3 units lecture (150 minutes), 1 unit lab (150 minutes).
Required for CS, CE
Computer Organization and Design, 5th edition, David A. Patterson and John L. 
Hennessy, Morgan Kaufmann Publishers, 2013, ISBN-13 9780124077263 (print)
or 9780124078864 (eBook).
None
Melissa Danforth, Marc Thomas, Wei Li
This course covers the following ACM/IEEE CS2013 (Computer Science) and 
ACM/IEEE CE2004 (Computer Engineering) Body of Knowledge student learning 
outcomes: 
CS-AR/Digital Logic and Digital Systems (CE-DIG review)
CS-AR/Memory System Organization and Architecture (CE-CAO3)
CS-AR/Interfacing and Communication (CE-CAO4, CE-CAO6)
CS-AR/Functional Organization (CE-CAO6, CE-CAO7)
CS-PD/Parallel Architecture (CE-CAO9)
CS-SF/Computational Paradigms
CS-SF/State and State Machines (CE-CAO6)
CS-SF/Evaluation (CE-CAO8)
CS-SF/Proximity (CE-CAO3)
CS-SF/Virtualization and Isolation (CE-CAO3)
The course maps to the following performance indicators for Computer Science
(CAC/ABET) and Computer Engineering (CAE/ABET):
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(CAC PIa1, EAC PIa1): Apply and perform the correct mathematical analysis. 
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(CAC PIc1): Identify constraints on the design problem and establish criteria for acceptability of solutions. 
(EAC PIc1): Follow systematic and logical design procedures and define specifications to meet project requirements. 
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(CAC PIc2): Carry solution through to the most economic/desirable solution and justify the approach. 
(EAC PIc3): Consider alternative designs and choose the optimal solution. 
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(CAC PIi2): Use appropriate simulation software and/or hardware design tools application. 
(EAC PIk1): Use appropriate tools, simulation software, or hardware design tools to solve engineering problems. 
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(CAC PIj1): Understand performance and cost as these relate to software/firmware-based and hardware-based implementations. 
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(EAC PIj3): Understand the relation of classical topics in engineering with their implementation in modern technologies. 
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| Week | Chapter(s) | Topics | 
| 1 | Chapters 2 and 3, Appendices A and B | 
Number systems and arithmetic, Assembly, Digital logic | 
| 2 | Chapter 1 | 
Computer abstractions and technologies, Performance | 
| 3 | Chapter 5 | 
Memory systems, Caches | 
| 4 | Chapter 5 | 
Virtual Memory, Virtual Machines | 
| 5 | Chapter 4 | 
Datapath overview, Single instruction datapath | 
| 6 | Chapter 4 | 
Single instruction datapath continued | 
| 7 | Chapter 4 | 
Pipelined datapath | 
| 8 | Chapter 4 | 
Pipelined datapath continued | 
| 9 | Chapter 4 | 
Pipelined control unit, Hazards in pipelined datapaths | 
| 10 | Chapter 4 | 
Handling data and control hazards | 
| 11 | Chapter 4 and external topics | 
Exception handling, Interfacing with I/O subsystems | 
| 12 | Chapter 4 | 
Instruction level parallelism | 
| 13 | Chapters 4 and 5 | 
Branch prediction, Parallelism in memory systems | 
| 14 | Chapter 6 | 
Introduction to parallel processors | 
| 15 | Chapter 6, Appendix C | 
GPUs as an example of multithreaded multiprocessor architectures | 
Not applicable to this course.
Melissa Danforth on 31 July 2014
Approved by CEE/CS Department on [date] 
Effective Fall 2016